The performance enhancements of coarse-grain reconfigurable cryptographic arrays (CGRCAs) through technology upgrades and increasing chip size are approaching limits. Enhancing parallel processing capabilities can relieve the computational burden on CGRCA in high-density computing scenarios. Specifically, a novel parallel processing approach is introduced in this paper, named virtual heterogeneous multi-core pipelining (VHMP). VHMP supports virtual heterogeneous multi-core and intra-core multitask pipelining. Informed by hardware virtualization principles and analysis of CGRCA architectures, VHMP constructs virtual computing cores (VCCs) on CGRCA using multi-launch pipelines and implements multitask interleave pipelines within each VCC, enabling parallel processing at pipeline, task, and instruction levels. Furthermore, a hierarchical control mechanism is embedded within VHMP, integrating virtual computing path level and task-level management. This control mechanism allows diverse cryptographic algorithms to run concurrently without being bound to specific types or modes. Finally, applying VHMP to a 32 × 4 CGRCA, 32 heterogeneous VCCs are instantiated, with each core handling up to 16 interleaved tasks. Compared to treating CGRCA as a homogeneous multi-core processor, the VHMP approach achieves an average acceleration of 4.33 × (up to 6.34 ×) with quadrupled instruction execution capability. Additionally, the control mechanism reduces context volume to 18.7% and boosts configuration speed by 3 ×. Compared with related architectures, VHMP improves CGRCA throughput by an average of 5.3 ×.
SONG et al. (Mon,) studied this question.