RAG Prompting and DQN Reinforcement Learning-based Integrated Framework for 2stage-OpAmp Layout Automation and LPE Performance Optimization

Key Points

• The aim is to develop an automated framework integrating RAG prompting and DQN reinforcement learning for optimizing analog circuit layout.
• Utilized RAG prompting for device placement and routing layout generation.
• Employed DQN reinforcement learning to iteratively correct DRC/LVS discrepancies.
• Compared performance of schematic and layout simulations through parasitic extraction.
• Successfully automated the generation, validation, and optimization of analog circuit layouts.
• Minimized performance differences between circuit simulations and layouts.

Abstract