Extended user interrupts (xUI) is a set of processor extensions that enable near zero-cost notification in user space. This paper deconstructs Intel’s UIPI design, the only existing user-space interrupt system, through analysis and measurement, and uses this to develop an accurate model of its timing. It then introduces five novel enhancements to user interrupts: Tracked interrupts, hardware safepoints, a kernel bypass timer, interrupt forwarding, and Hardware Barriers. The paper also proposes a user interrupt system for the RISC-V architecture and shows how xUI’s enhancements can be applied to the RISC-V interrupt architecture. xUI is modeled in gem5 simulation and evaluated on four use cases: preemption in a high-performance user-level runtime, IO notification in a layer3 router using DPDK, IO notification in a synthetic workload with a streaming accelerator modeled after Intel’s Data Streaming Accelerator, and synchronization in a synthetic multi-accelerator workload. This work shows that xUI offers the performance of shared-memory polling with the efficiency of asynchronous notification.
Aydogmus et al. (Wed,) studied this question.