A low-cost, high-robust, high-gain preamplifier is fabricated in a 65 nm CMOS for Hall sensors. A semi-open loop that combines an optimized differential–difference amplifier with a simplified open-loop amplifier is proposed to achieve stringent transconductance matching, with the same DC and AC conditions. A two-stage reconfigurable structure, together with an embedded offset-accumulation elimination scheme, relieves open-loop stress and achieves both high fidelity and accurate gain. The experimental results show that the preamplifier has a variable gain of 34.6–46.6 dB and a gain error no more than 0.12% under process/voltage/temperature variations and without error calibration, at the cost of an active area of 0.076 mm2 and a current dissipation of 0.7 mA under a 2.5–3.3 V supply. Specifically, both the loop topology and the transconductance match are different from the existing works.
Wang et al. (Fri,) studied this question.