ABSTRACT The parasitic inductances of power loops in Silicon Carbide (SiC) power modules are critical parameters affecting dynamic current sharing, and their model can provide theoretical guidance for the design of dynamic current balancing. However, the coupled parasitic inductance matrix (CPIM) involved in the traditional model contains self‐inductances and complex coupled mutual inductances, which hinder direct quantitative evaluation of the parasitic inductance differences in the power loops of paralleled chips. Based on the circuit equivalence principle, this paper proposes a decoupling calculation method for the CPIM, which realises the solution and modelling of equivalent parasitic inductances (EPIs) by matrix diagonalisation. Combined with the switching states of chips, the current distribution characteristics in dynamic current sharing are clarified. Then, according to the concepts of partial self‐ and mutual inductance, the coupled parasitic inductance network model (CPINM) is developed. Based on the identical V – I characteristics of model circuits before and after decoupling, the CPIM is diagonalised to calculate the EPIs. Finally, the EPI models for actual 4‐chip and 6‐chip paralleled power modules are developed, and the accuracy of the models is verified by theoretical and experimental analysis.
Yang et al. (Thu,) studied this question.