Abstract Field-effect transistors (FETs) with 2D channels have already approached trial FAB integration. However, reliability limitations caused by various defects impede their smooth way forward. Still the ongoing research is mostly focused on pure technology aspects, while reliability is often recalled only to manifest a “negligible” hysteresis for a randomly measured gate transfer curve. In fact the hysteresis dynamics contain unique fingerprints of various mechanisms which may coexist or cancel each other, especially in scaled FETs where defects can simultaneously interact with multiple interfaces. To fill this gap, here by doing TCAD modeling for nanoscale MoS 2 /HfO 2 FETs we first introduce the universal hysteresis mapping method which can correctly capture diverse hysteresis dynamics such as conventional clockwise (CW) and counterclockwise (CCW) hysteresis, CW/CCW switching and time separation. Then we validate this method using experimental data for MoS 2 FETs and demonstrate that it can be used directly for any measured hysteresis dataset to reveal additional physical insights with no need for TCAD modeling.
Lv et al. (Mon,) studied this question.