Three-dimensional integration is a pivotal strategy for advancing the integrated circuit performance beyond traditional scaling limits. Herein, we report a monolithic 3D (M3D) integration technology using carbon nanotube (CNT) networks to fabricate four-layer complementary metal oxide semiconductor (CMOS) thin-film transistors (TFTs), representing the highest layer count to date for CNT-based CMOS M3D devices. The vertically stacked structure achieves enhanced integration density through layer-by-layer stacking with interlayer isolation via low-temperature-processed dielectrics, enabling the stable operation of N-type and P-type CNT-TFTs in separate layers. Functional IC units, including CMOS inverters and trans-impedance amplifiers (TIAs), were successfully implemented using this four-layer architecture. Furthermore, vertical integration of the M3D TIA with a molybdenum disulfide (MoS2) photodetector realized a monolithic optoelectronic sensing system, achieving primary amplification of photocurrents with a trans-impedance gain of 7.21 × 103 Ω. This work validates the feasibility of CNT-based M3D integration for high-density, multifunctional ICs and paves the way for next-generation optoelectronic systems and power devices.
Li et al. (Tue,) studied this question.
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