This preprint introduces the concept of the Information–Energetic Chip (IET Chip) as a new architectural framework that explicitly incorporates the physical cost of irreversible decisions into chip design. Extending Landauer’s principle into a measurable invariant, the paper proposes the dimensionless indicator: 𝑁̃ₜ = P / (kB T ln2 · Ĩ) which quantifies how many times more than the minimal physical energy a system expends per bit of irreversible decision per unit time. This enables an objective comparison across classical CPUs, AI accelerators, and quantum processors. Current architectures are shown to deviate significantly from the physical efficiency limit due to decision-centric overhead, rather than fundamental information evolution. The IET Chip is defined as a hypothetical architecture optimized for minimal decision dissipation per unit of time and information. The framework also outlines benchmark methods and interprets energy–information trade-offs in light of real chip data. Keywords: Information–Energetic Chip, Landauer Limit, Quantum Computation, Irreversible Decisions, Chip Efficiency, Energy Dissipation, Architectural Benchmarking
Martin Petrásek (Tue,) studied this question.