This work demonstrates key solutions for the ultimate cointegration of SiGe HBT, PDSOI switches and high-quality passives with 3D sequential integration. A Local Trap Rich (LTR) with RF isolation comparable to the state-of the-art TR substrate, and a bulk SiGe HBT withstanding the top tier thermal budget are shown. A high-performance RFSOI switch processed at 600°C featuring RON×COFF=96fs & RFVmax=2.7V is also demonstrated, which is a major breakthrough. Together, these results pave the way towards a fully monolithic Silicon Front-End Module (FEM) for advanced efficient and cost-effective RF systems.
Fache et al. (Sat,) studied this question.