ABSTRACT This paper proposes a sorting‐based stiffness storage and solution strategy for GPU‐accelerated isogeometric topology optimization. Based on the NURBS‐based isogeometric analysis, the stiffness matrix is discretized using an interaction‐wise control point pair formulation, which avoids thread race conditions in GPU parallel assembly. To reduce memory consumption, a two‐stage sorting strategy is developed to implicitly encode the row and column indices of the sparse stiffness matrix through ordered coefficient storage without explicitly storing index arrays. On this basis, an efficient GPU‐oriented sparse matrix–vector multiplication (SPMV) algorithm is constructed and further accelerated by integrating the warp‐level LightSPMV scheme, as well as their parallel implementations for multi‐GPUs. Three numerical examples are applied to validate the effectiveness of the proposed method. Results show that it can effectively reduce the memory usage while enhancing computational efficiency. The multi‐GPU scalability is also exhibited, with about 47.40%–64.83% improvement in efficiency.
Nie et al. (Wed,) studied this question.