Physics-Based Modeling of the Single Event Upset Critical Charge in Digital Electronics

Key Points

• The aim is to develop a model for the critical charge involved in single event upsets in digital circuits.
• Derived explicit expressions for critical charges.
• Focused on technological and circuit parameters.
• Analyzed CMOS SRAM characteristics.
• Established a general modeling approach for critical charge.
• Identified dependencies on circuit and technology parameters.
• Provided insights relevant for designing resilient digital circuits.