A Fast and Accurate Single-Event Transient Reliability Analysis of Logic Circuits Using Adaptive Importance Sampling Method

In nanometric integrated circuits, reliability has become one of the main design measures for space and safety-critical applications. This makes the reliability evaluation process an inevitable part of the circuit design flow. The Monte Carlo method typically adopts random sampling for single-event transient reliability evaluation, which leads to large variance in the estimated reliability. To address this issue, we develop an adaptive importance sampling ( AIS ) method for early stages of the design. AIS has several iterations of sampling region adjustments. By iteratively searching for failure regions, AIS may lead to better efficiency and accuracy. Additionally, a fast fault injection method is proposed to support adaptive importance sampling and multi-dimensional reliability analysis for logic circuits. Furthermore, we design an open-source netlist-level fault injection tool named NFIT . The convergence speed of the AIS method has been demonstrated to achieve up to an 18x acceleration compared to the Monte Carlo method on the ISCAS’85, EPFL, and ALS benchmark suites. We use the NFIT tool to evaluate the effect of circuit structure and targeted hardening on circuit reliability. The results indicate that, for the same Boolean function, the circuit structure has a notable influence on reliability. They also show that hardening a few critical gates can significantly improve circuit reliability.