In this work, we present the design and fabrication of high-performance β-Ga 2 O 3 metal–oxide–semiconductor field-effect transistors with enhancement mode featuring a non-recessed gate architecture and high-κ dielectric integration. The device structure, grown on c-plane sapphire substrates by metalorganic chemical vapor deposition, consists of a heavily doped β-Ga 2 O 3 contact layer, a lightly doped β-Ga 2 O 3 buffer, an (Al 0.21 Ga 0.79 ) 2 O 3 barrier, and an unintentionally doped (UID) channel from the surface toward the substrate. The junction of (Al 0.21 Ga 0.79 ) 2 O 3 and UID channel layer induces a potential well, while the non-recess process avoids plasma-induced surface damage and streamlines fabrication. To enhance electrostatic control, conventional Al 2 O 3 gate dielectrics are replaced with hafnium dioxide (HfO 2 ), whose high permittivity strengthens gate-channel capacitive coupling without increasing physical thickness. This modification enhances the effective oxide capacitance, and thus improves the on current increases and on/off current ratio. Electrical characterization and theoretical analysis confirm that the combined non-recessed design and high-κ gate dielectric yield substantial performance gains, providing a viable pathway toward next-generation β-Ga 2 O 3 power and high-frequency electronic devices.
Chang et al. (Fri,) studied this question.