Wafer map defect pattern classification supports quality monitoring in semiconductor manufacturing, but public benchmark datasets such as WM-811K exhibit extreme class imbalance, where majority classes can dominate standard metrics. This study aims to improve minority class performance while maintaining inference efficiency. Building on an iFormer-based hybrid backbone, we propose the Pattern-Selective Sequential Hybrid Network (PSS-HNet), which redesigns attention blocks to sequentially integrate local interaction (Modulated Convolution) and global interaction (Modulated Axial Attention) and applies sigmoid-based gating to control contextual information injection. Experiments on WM-811K (9 classes) compare iFormer (baseline), Axial-only, Axial+Modulation, and PSS-HNet using macro-averaged metrics as primary indicators, along with class-wise analysis and efficiency evaluation. PSS-HNet improves Macro-Recall by 1.02 percentage points (from 0.8852 to 0.8954) and Macro-F1 by 0.54 percentage points (from 0.9044 to 0.9098) over the baseline while maintaining similar accuracy. It also reduces computational cost and inference latency to 0.754 G FLOPs, 4.381 M parameters, and 7.682 ms, compared with 1.103 G FLOPs, 6.245 M parameters, and 8.666 ms for the baseline. Overall, selective sequential local–global integration provides a favorable balance between minority class performance and efficiency.
Song et al. (Tue,) studied this question.