ABSTRACT This paper presents and experimentally verifies an improved offline pulse density modulation (PDM) technique for the SWISS rectifier (SR) to enhance input current quality while satisfying harmonic standards. The proposed approach rearranges zero‐pulse intervals within predefined PDM sequences to suppress low‐order harmonics and improve the symmetry of the input current waveform. The modulation scheme is implemented on a hybrid digital signal processor (DSP)–FPGA platform, where the DSP performs sector detection and the FPGA generates high‐resolution switching sequences. Two pulse‐distribution strategies are investigated: a conventional stepped sequence and an interleaved formulation. Experimental results at a switching frequency of 38.4 kHz demonstrate that the interleaved PDM distribution significantly improves the input current waveform, reducing the total harmonic distortion of the input current (THD i ) from above 30% to about 10% while maintaining a power factor (PF) above 0.96. Harmonic measurements obtained using a power‐quality analyser confirm compliance with the limits defined in EN 61000‐3‐2 Class A under the tested conditions. To evaluate scalability towards higher switching frequencies, additional simulations and analytical device‐stress evaluations are conducted at 105.6 and 172.8 kHz. Results show that the PDM‐based SR can achieve THD i as low as 3.3% with a near‐unity PF while maintaining stable DC‐link operation and acceptable semiconductor stress levels.
Ngo-Phi et al. (Thu,) studied this question.