The proposed FPGA-based heart rate detection system using High-Level Synthesis achieved an accuracy of 99.45% with a low latency of 2.7 ms and power consumption of 0.2 W.
Does an HLS-based ECG heart rate detection system on Zynq-7000 improve accuracy, latency, and power consumption compared to traditional methods?
The proposed HLS-based FPGA implementation provides a highly accurate (99.45%), low-latency (2.7 ms), and energy-efficient (0.2 W) solution for real-time ECG heart rate monitoring suitable for wearable devices.
Heart rate is one of the most critical vital signs for assessing an individual’s health. Therefore, researchers are trying to find a precise and fast method of calculating and monitoring the heart rate. One of the common methods for calculating the heart rate is using electrocardiogram signals (ECG). So far, many designs have been created for heart rate calculation using these signals, but most of these methods involve lengthy and complex pre-processing steps. Therefore, this study aims to employ a new simple structure for heart rate calculation using electrocardiogram signals, unlike the previous complex methods (wavelet transform, Tompkins, Pan). In addition, the proposed design was implemented on the Zynq series 7 chip by a high-level synthesis method to evaluate its performance. This design, besides simplicity, has a relatively high accuracy of about 99.45%.
Shahri et al. (Tue,) conducted a other in Heart rate detection (n=18,885). FPGA-based heart rate detection using High-Level Synthesis on Zynq-7000 vs. Traditional methods (e.g., Pan-Tompkins, Wavelet Transform) was evaluated on Heart rate detection accuracy. The proposed FPGA-based heart rate detection system using High-Level Synthesis achieved an accuracy of 99.45% with a low latency of 2.7 ms and power consumption of 0.2 W.