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This brief presents an ultra-low voltage (ULV) charge pump (CP) topology with high power conversion efficiency (PCE) designed for ultra-low supply voltage, low-power on-chip applications. The proposed ULV-CP employs a combination of dynamic gate-bias (DGB) and forward body-bias (FBB) techniques with the objective of enhancing overdrive voltage and reducing conduction losses, thereby enabling operation at ultra-low voltage. A 4-stage ULV-CP has been designed and implemented in a 22-nm FD-SOI process. Measurement result shows that it can reach a peak PCE of 83.87% at a supply voltage of 0.36 V. Compared to other CP circuits, the proposed circuit outperforms in terms of PCE, maximum output power, and minimum supply voltage.
Zhang et al. (Wed,) studied this question.