Microkernels reduce the trusted computing base and improve fault isolation by moving drivers and system services to user space, but IPC overhead remains a central design concern in service-decomposed systems. This paper presents NEURON, a compact Rust-based capability microkernel for RISC-V, as a reference implementation that makes the transition from copy-based messaging to zero-copy bulk transfer an explicit, enforceable architectural boundary. NEURON enforces a hard 8~KiB (8192 bytes) upper bound on inline IPC payloads at the syscall boundary, yielding a bounded control-plane path for small request/reply interactions. Bulk data is handled via a dedicated data-plane primitive: capability-protected virtual memory objects (VMOs) that can be mapped across address spaces without copying payload bytes through the kernel IPC path. We characterize control-plane behavior using reproducible microbenchmarks on a RISC-V QEMU ``virt'' platform. A loopback benchmark isolates kernel IPC overhead and shows latency increasing approximately linearly with payload size up to the 8~KiB boundary (~ 9.8-47µs), consistent with copy-dominated inline transfer. A cross-task ping-pong benchmark between isolated tasks shows largely payload-insensitive round-trip latency for 8-512 B messages (~186-190 µs), indicating that scheduling and address-space transitions dominate control-plane RPC costs in the current prototype. These results motivate ``bounded control + explicit bulk'' as a practical default for microkernel service decomposition, while leaving fast-path IPC optimizations and high-throughput VMO evaluation to future work.
Jenning Schäfer (Tue,) studied this question.