OneSyn: One-Pass Architectural Synthesis Algorithm for Fully Programmable Valve Array Biochips

As the next generation of continuous-flow lab-on-a-chip platforms, Fully Programmable Valve Array (FPVA) biochips are revolutionizing traditional biochemical experiments with their remarkable flexibility and programmability. Due to the intricate interplay between chip architecture and bioassay protocols, architectural synthesis has emerged as a critical stage in such chips design, encompassing three core phases: high-level synthesis, component placement, and flow channel routing. Over the past decade, design automation for FPVA biochips has attracted significant interest and achieved notable progress. However, existing architectural synthesis algorithms for FPVA biochips typically treat these phases in isolation rather than as an integrated whole, leading to increased conflicts, resource redundancy, and potential design failures. To address these challenges, this paper proposes a high-quality and efficient one-pass architectural synthesis algorithm called OneSyn for FPVA biochips. By unifying all design phases into an “organic whole”, OneSyn eliminates gaps among these phases, yielding a more efficient and cost-effective biochip architecture. First, the one-pass synthesis for FPVA biochips is formulated as an Integer Linear Programming (ILP) model with a resource-aware objective and constraints on scheduling, placement, and routing, establishing a unified optimization framework that effectively prevents inter-phase conflicts. Second, various graph-based pruning strategies are proposed to eliminate redundant constraints in the ILP model based on component–reagent relationships in the sequencing graph. Consequently, the solution-space complexity is reduced, CPU time decreases, and overall efficiency improves. Experimental results demonstrate that, compared with related algorithms, OneSyn effectively optimizes both the total completion time of bioassays and the total path length of fluid transport.