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March 1, 20260 citations

Multi-Bit Floating-Gate Memory with an Ultrawide Programmable Window.

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CLChang LiNLNing LinDYDongliang Yang

Key Points

  • To develop a high-density, multilevel, and ultrafast floating-gate memory device for data processing and storage.
  • Constructed a MoTe2/hBN/MLG van der Waals heterojunction
  • Evaluated memory window size and storage capacity under electric pulse modulation
  • Assessed performance in terms of endurance and data retention over cycles
  • Employed a digital-analog architecture for image classification.
  • Achieved a memory window of approximately 199.2 V and a memory window ratio of 90.5%
  • Demonstrated a storage density greater than 10^13 cm^-2
  • Showed an ultrafast response speed of 50 ns and robust endurance over 10^6 cycles
  • Exceeded 6 bits of multilevel memory and displayed synaptic plasticity
  • Achieved over 95% accuracy in CIFAR-10 image classification.

Abstract

The rapid growth of data-intensive computing and optoelectronic information processing demands memory devices with high density, multilevel programmability, and fast operation. Floating-gate memory has attracted considerable attention due to its reliable charge-storage characteristics, but it is still limited by low storage density, restricted multilevel capability, and the lack of optoelectronic integration. Here, we report a Molybdenum ditelluride/hexagonal boron nitride/multilayer graphene (MoTe2/hBN/MLG) van der Waals heterojunction that achieves an ultrawide p-type memory window (∼199.2 V), a high memory window ratio of 90.5%, and an ultrahigh storage density (>1013 cm-2). Our device demonstrates an ultrafast response speed of 50 ns, robust endurance over 106 cycles, and reliable data retention projected for 10 years. Under electrical pulse modulation, we achieved multilevel memory exceeding 6 bits and successfully emulated synaptic plasticity. Furthermore, robust negative photoconductance (NPC) enables laser-driven optical modulation with multilevel memory exceeding 7 bits. In addition, we employed a hybrid digital-analog architecture to simulate in-memory computing for CIFAR-10 image classification, achieving an accuracy exceeding 95%, comparable to pure digital implementations. Together, these advances position our device as a promising building block for scalable neuromorphic and optoelectronic information technologies.

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Cite This Study

Li et al. (2026) studied this question.

synapsesocial.com/papers/69a3d7eeec16d51705d2e619https://doi.org/10.1002/smll.202510769
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