An Improved Virtual Space Vector Modulation for Suppressing Common‐Mode Voltages of Three‐Phase Inverters

ABSTRACT In three‐phase two‐level inverters, the virtual space vector modulation (VSVM) has attracted widespread attention due to its ability to reduce the amplitude of common‐mode voltage and third harmonics. However, there are still problems such as rich harmonic components of common‐mode voltage and a high rate of occurrence of amplitude and direction changes. To address these issues, an improved VSVM method is proposed. By analyzing the vector synthesis and common‐mode voltage characteristics of the classic VSVM, the basic vectors corresponding to the virtual vector and the virtual zero vector are optimally sorted, so that the common‐mode voltage waveform of each switching cycle is the same, which are all single rectangular waves. The common‐mode harmonic, dead time compensation, and switching losses of the proposed method are further analyzed. Simulations and experiments are conducted in an inverter‐permanent magnet synchronous motor system. The results show that, compared with the classic VSVM, the proposed method reduces the rate of occurrence of amplitude and direction changes by three times while maintaining the low amplitude of the common‐mode voltage. It completely eliminates the baseband harmonics and sideband harmonic components and reduces the peak value of the high‐frequency segment of the common‐mode voltage by an average of 6 dB. Meanwhile, the performance of line voltages, line currents, torque, and speed remains excellent. This method can more effectively suppress common‐mode current without increasing the system volume and cost, which is beneficial for the design of common‐mode filters and provides a reference for the research of other common‐mode suppression PWM methods.