Emerging Memory and Device Technologies for Hardware‐Accelerated Model Training and Inference

ABSTRACT The accelerating evolution of artificial intelligence (AI) has underscored the need for energy‐efficient hardware that can overcome the memory bottleneck inherent to von Neumann architectures. To address this challenge, compute‐in‐memory (CIM) architectures based on emerging memory technologies with analog tunability and scalability have emerged as an effective solution for parallel and low‐power computation. This review discusses recent progress in emerging memories—including resistive, phase‐change, ferroelectric, electrochemical, and charge‐based devices—and their implementation in CIM architectures for both training and inference. We highlight material‐ and device‐level strategies to achieve high endurance, analog multilevel switching, and linear weight updates required for training‐centric systems, as well as stable retention and low power crucial for inference‐centric applications. Furthermore, we discuss efforts on system‐level integration that combine device‐level advances with circuit/architecture co‐optimization to construct efficient hardware platforms. By bridging materials science, device physics, and system‐level integration, this review provides a comprehensive perspective on the pathways toward energy‐efficient CIM hardware for next‐generation edge and on‐device AI systems.