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February 2, 2026Electronics Letters0 citationsOpen Access

Automated Partition‐Based Liberty Modelling for Asynchronous Circuits

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SHShahzad HaiderRDRuochen DingNRNaheel Raza Rizvi

Key Points

  • The research aims to improve automated liberty characterization for asynchronous circuits by developing a new methodology.
  • Introduced a partition and recomposition strategy
  • Utilized loop-free sub-blocks with four-phase testbenches
  • Recomposed liberty snippets into sign-off views
  • Limited functional error to below set thresholds
  • Maintained timing deviation within acceptable limits
  • Achieved power error reduction to 13% while retaining pin count

Abstract

ABSTRACT Automated liberty characterization remains elusive for asynchronous cells whose feedback and multi‐output behaviour break monolithic flows. We introduce a partition and recomposition strategy that exercises loop‐free sub‐blocks with exhaustive four‐phase testbenches and recompose the resulting liberty snippets into sign‐off views. Applied to sense amplifier half buffers, the flow limits functional error to below , timing deviation to , and power error to 13– while retaining of pins. The approach eliminates bespoke scenarios, scales linearly with library size, and enables asynchronous circuits to integrate into electronic design automation sign‐off.

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Cite This Study

Haider et al. (2026) studied this question.

synapsesocial.com/papers/6981020cc1c9540dea8133dahttps://doi.org/10.1049/ell2.70519
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