Learning-driven identification of fault-relevant test patterns for cost-efficient VLSI testing

Puntos clave

• Identifying fault-relevant test patterns enhances cost-efficiency in VLSI testing, streamlining testing processes.
• Machine learning algorithms assist in determining the most effective test metrics for fault detection during VLSI testing.
• This analysis uses an innovative approach to enhance VLSI testing by integrating data-driven insights into the testing framework.
• Highlighting the benefits of fault-relevant patterns indicates potential improvements in testing efficiency and accuracy.