I present Catalyst N3, the third generation of the Catalyst neuromorphic processor architecture. Where N1 matched Intel Loihi 1 and N2 achieved full Loihi 2 feature parity, N3 moves beyond parity to introduce capabilities absent from all current neuromorphic hardware. The architecture comprises 128 cores organised into 16 tiles of 8 cores each, supporting 524K physical neurons at 24-bit precision or 4.2 million virtual neurons through hardware time-division multiplexing. A four-thread parallel microcode engine with 80 registers enables eight hardwired neuron models, including INT8 multiply-accumulate for conventional neural networks, plus a user-defined custom model via a 13-opcode instruction set. Four configurable synapse formats (72-bit full, 49-bit inference, 20-bit compact, and 35-bit low-rank FACTOR) support variable-precision weights from 1 to 16 bits. Sixteen per-tile learning accelerators, each with a 28-opcode instruction set and four-stage pipeline, eliminate the cross-chip learning bottleneck present in prior architectures. Hardware metaplasticity via 3-bit per-synapse consolidation and homeostatic plasticity via EWMA firing-rate tracking provide silicon-native network stabilisation without software intervention. A three-level asynchronous-synchronous hybrid network-on-chip with adaptive routing, express links, and spike compression achieves near-zero idle power. The accompanying neurocore SDK (v3.7.0) provides 88 modules, 3,091 tests, and three interchangeable backends (CPU, GPU, FPGA). I validate an 8-core tile on an AWS F2 Xilinx VU47P FPGA at 62.5 MHz, achieving 19/19 hardware test pass rate and 14,512 timesteps per second, a 3.7x improvement in per-neuron energy efficiency over N2 on identical hardware (4.04 nJ/neuron-op vs 14.8 nJ). Benchmark evaluation on the Spiking Speech Commands dataset yields 76.4% test accuracy, a new state of the art, exceeding Intel Loihi 2 (69.8%) by 6.6 percentage points and the previous best software result (74.2%) by 2.2 points. On Spiking Heidelberg Digits, N3 achieves 91.0% test accuracy, exceeding both N2 (90.7%) and Intel Loihi 2 (90.9%). ASIC characterisation via Yosys and OpenLane (SKY130 130 nm) confirms full synthesisability, with geometric scaling projecting approximately 57 GSOPs/J at 28 nm. Catalyst N3 is, to my knowledge, the first neuromorphic architecture to unify spiking and conventional neural network execution, hardware virtualisation, and silicon-native metaplasticity in a single chip.
Henry Arthur Shulayev-Barnes (Thu,) studied this question.