Efficient FPGA Implementation of ECDSA Process based on the Combination of Dual Microblaze Processor and HW/SW Co-Design

Puntos clave

• To enhance the efficiency of the ECDSA process through FPGA implementation utilizing dual Microblaze processors and hardware/software collaboration.
• Designed a dual Microblaze processor system for ECDSA implementation
• Utilized hardware/software co-design techniques to improve efficiency
• Evaluated performance metrics of the FPGA implementation
• Achieved significant performance improvements in ECDSA processing speed
• Demonstrated reduced resource usage compared to traditional implementations
• Enhanced overall system efficiency with optimized hardware/software integration