Multivalued logic (MVL) offers a promising strategy to enhance information processing density while reducing system complexity in the post-Moore era. Conventional MVL realization primarily depends on p-n heterojunction architectures; however, n-type organic semiconductors (OSC) often suffer from poor ambient stability, compromising the device reliability. Herein, we demonstrate that multithreshold voltage (multi-VTH) transistors can be achieved using a single p-type organic semiconductor through coplanar self-assembled monolayer (SAM) modification, a strategy that is compatible with various oxide dielectrics. The locally induced surface potential transitions generated by coplanar SAMs occur within a relatively small range at the monolayer interface, enabling the formation of multiple VTH values within a single active channel. By optimization of SAM combinations and channel width ratios, well-balanced intermediate logic states are realized in ternary inverter configurations. Moreover, because coplanar SAMs can be patterned using standard photolithography, this approach circumvents the complex alignment challenges associated with organic semiconductor heterojunctions, particularly as the device dimensions continue to scale down.
Yu et al. (Tue,) studied this question.