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March 14, 2026International Journal of Circuit Theory and Applications0 citations

A 40k S/s 6‐Bit Flash ADC Circuit Design With Dual Positive‐Feedback Comparator Using InGaZnO Thin‐Film Transistors

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STSong TangHHHongyu HePYPeng Yang

Key Points

  • To design a high-speed 6-bit flash ADC using InGaZnO TFTs and a dual positive-feedback comparator.
  • Developed a 6-bit flash ADC circuit utilizing InGaZnO thin-film transistors.
  • Implemented a dual positive-feedback loop comparator with robust performance metrics.
  • Integrated an encoder and resistor-string DAC within the ADC design.
  • Achieved a sampling rate of 40k S/s.
  • Reported DC gain of the comparator at 47 dB with transient response below 3.
  • Demonstrated a maximum DNL of 0.44 LSB and INL of 0.76 LSB.

Abstract

ABSTRACT This work presents a 6‐bit flash analog‐to‐digital converter (ADC) based on indium gallium zinc oxide (InGaZnO) thin‐film transistors (TFTs) featuring a high‐speed comparator with dual positive‐feedback loop. The proposed comparator thus achieves a DC gain of 47 dB, enabling a transient response below 3 and a minimum detectable voltage difference of 1 . In comparison, conventional InGaZnO TFT comparators typically exhibit response times exceeding 30 and minimum detectable voltages above 10 mV. Leveraging this high‐performance comparator, the full flash ADC integrates an InGaZnO TFT‐based encoder and resistor‐string digital‐to‐analog converter (R‐DAC). The designed ADC circuit obtains a sampling rate of 40k S/s with a maximum differential nonlinearity (DNL) of 0.44 least‐significant bit (LSB), a maximum integral nonlinearity (INL) of 0.76 LSB, and an active area of 25 mm 2 . The proposed ADC is promising for high‐end flexible electronics applications.

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Cite This Study

Tang et al. (2026) studied this question.

synapsesocial.com/papers/69b4fbb1b39f7826a300c08ehttps://doi.org/10.1002/cta.70390
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