Dual‐Gate Ambipolar MoTe 2 Transistor Enabled Reconfigurable Logic and Memory for Next‐Generation Computing

ABSTRACT The rapid expansion of artificial intelligence (AI) and other data‐driven applications demands energy‐efficient and compact computing architectures that overcome the limitations of conventional von Neumann systems. 2D semiconductors offer promise for reconfigurable logic, but existing designs face a trilemma between integration density, functionality, and operational stability. Here, we present a dual‐gate field‐effect transistor based on a graphene/h‐BN/MoTe 2 /h‐BN heterostructure that unifies four reconfigurable logic operations (AND, OR, NAND, NOR) and nonvolatile n‐/p‐type memory within a single device. All logic operations are achieved under an identical back‐gate voltage, enabled by synergistic optoelectronic modulation of MoTe 2 polarity, yielding a 90 % reduction in transistor count compared to conventional CMOS. The device demonstrates robust reconfigurability through more than 24 full cycles of direct, arbitrary switching among four distinct polarities without intermediate states. Dynamic switching between logic and memory modes is controlled by the graphene top gate, where memory operation delivers a 10 4 on/off ratio and >1000 s retention. Finally, we demonstrate logic‐in‐memory computing and image processing tasks, underscoring the device's potential for next‐generation energy‐efficient computing architectures.