Modeling and Optimization of Diffusion Process Scheduling under Strict Queue Time Constraints in Semiconductor Manufacturing

This article examines wafer lots scheduling in the diffusion area in semiconductor manufacturing. The diffusion area comprises multiple tool groups. Each of them contains non-identical semiconductor tools. All tools can process multiple wafer lots simultaneously, and wafer lots processed together in a tool are called a wafer batch. Besides, each wafer lot has specific queue time limits (QTLs) between consecutive processing operations, making the scheduling problem more complicated. To solve it, a discrete backtracking search optimization algorithm (DBSA) is designed for optimizing both wafer lot assignments and wafer batch processing sequences. Once the processing sequence of wafer batches at each tool is determined, a linear program (LP) is built to obtain optimal starting and completion time points of wafer batches while satisfying QTLs. If a schedule is examined to have no feasible solution by the LP, a proposed approach is used to regroup wafer lots to form wafer batches and adjust their processing sequences to potentially make it feasible. Extensive experiments show that DBSA reliably produces feasible schedules and outperforms GA, MixPSO, and GWO, with up to 17.75%, 19.19%, and 9.21% reductions in average cycle time, respectively, demonstrating its superiority in both solution quality and practical applicability.