A Novel Architecture of Grounded and Floating Memristors Designed Using Low Voltage Low Power Voltage Conveyor and Its Application in Filters

ABSTRACT This paper presents a low‐voltage, low‐power second‐generation voltage conveyor (VCII) that achieves enhanced bandwidth and reduced power consumption. The proposed VCII employs dynamic threshold MOS (DTMOS) technique to operate under reduced supply voltages, while resistive compensation is incorporated to extend the bandwidth. Two novel memristor emulator designs are introduced based on the proposed VCII. The grounded memristor emulator utilizes a single VCII, a resistor, a capacitor, and an NMOS transistor, whereas the floating emulator configuration employs two VCIIs, a resistor, and an NMOS transistor. The proposed VCII achieves a bandwidth of 325 MHz, an output impedance of 38 Ω at terminal Z , and a power consumption of 0.068 mW. Simulation results further demonstrate that the proposed grounded and floating memristor circuits exhibit distinct pinch hysteresis loops (PHL) in the voltage–current plane up to a frequency of 80 MHz and 1.5 GHz and power consumption of 0.12 and 0.25 mW, respectively. The designs have been validated using 180 nm CMOS technology parameters, operating at a low DC supply voltage of ±0.45 V. Both proposed memristor designs show robust and satisfactory performance across a wide frequency range. The layout and postlayout simulation results of the proposed VCII and both memristor emulators have also been carried out, occupying areas of 2116.13, 2205.02, and 4759.53 μm 2 , respectively. In addition, the process corner simulation of the proposed memristor is also included. The practical relevance of the memristor is demonstrated through the successful realization of low‐pass, high‐pass, and band‐pass filter circuits, highlighting their suitability for next‐generation memristive computing.