A Low-Power CNTFET-Based Optical Communication Receiver for 40 Gbps Applications

This paper presents an optical receiver system for 40 Gbps communication applications in 32 nm carbon nanotube field-effect transistor (CNTFET) technology. The architecture consists of a modified regulated cascode (MRGC)-based transimpedance amplifier (TIA), followed by limiting amplifiers (LAs). The TIA is designed using the methodology to optimize performance and power efficiency. Simulation results indicate that the modified TIA achieves a transimpedance gain of 56.6 dBΩ, a −3 dB bandwidth of 28 GHz, an input-referred noise current of 14 pA/√Hz, and a power consumption of only 177 µW. The TIA is fully transistor-based and occupies a compact 2240 nm × 1216 nm chip area. The LA stage provides a voltage gain of 10.3 dB, a bandwidth of −3 dB at 32 GHz, and power consumption of 382 µW, in an area of 11.14 µm². The optical receiver system demonstrates a transimpedance gain of 86.9 dBΩ, a −3 dB bandwidth of 34.2 GHz, total power consumption of 1387 µW, and occupies a chip area of 48.40 µm². All simulations are performed at a supply voltage of ±0.45 V, with the photodiode and load capacitors set to 10 fF. The gain, bandwidth, and input-referred noise characteristics of the TIA are derived analytically and discussed using the design methodology. Both analytical and simulation results confirm the suitability of the topology as a low-power optical receiver for next-generation communication systems.