The third-quadrant operation of silicon carbide (SiC) MOSFETs is investigated from the perspective of carrier transport, focusing on the interaction between two parallel conduction paths. Through experimental characterization and TCAD simulation, the conduction behavior of the PiN body diode and MOS channel under various gate-source bias conditions is examined. Results reveal that body-effect-induced threshold voltage (Vth) reduction enables channel conduction even under negative gate bias. Based on this mechanism, a transfer-characteristic-based method is developed to identify gate-voltage boundaries between conduction modes. The impact of negative gate bias on reverse recovery parameters, peak current (Irr), charge (Qrr), and time (trr), is quantitatively evaluated. At the unit-cell level, current sharing between the two paths is analyzed, clarifying the physical mechanism governing their redistribution.
Huang et al. (2026) studied this question.