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May 17, 20260 citationsOpen Access

Enhancing Smith–waterman Algorithm Performance for Gene Sequence Alignment Using Parallel Residue Number System Architecture

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COChinedu Emmanuel Okonkwo

Key Points

  • This work aims to enhance the performance of gene sequence alignment using an RNS-based architecture.
  • Developed a reconfigurable RNS-SWA arithmetic architecture featuring parallel ALUs.
  • Implemented moduli sets for DNA sequence alignment with independent residue processing.
  • Utilized VHDL simulation for structural descriptions of the system.
  • Achieved significant speed improvements over traditional non-RNS architectures.
  • Reduced power consumption while maintaining high-speed processing for genetic sequence calculations.

Abstract

The understanding of evolutionary relationships among biological entities enabled computer scientist’s researchers to developing various arithmetic number bases systems with remarkable genetic sequence alignment technique, where weaker analyses in homologous sequence are acceleratory detected and implemented. Using SWA for continuous improvement in the sensitivity of genes and proteins regulatory sequence alignment, three moduli sets are presented for DNA sequence alignment with residue of each modulus independently of each other, concurrently by parallel ALUs without carry propagation among them. Finally, we developed a reconfigurable RNS-SWA based arithmetic architecture with design support tool characterized in addition (ADD), subtraction (SUB), multiplication (MUX) using RNS conversion technique properties on a multi ALU system which provide structural VHDL simulation descriptions summary for the RNS-SWA Based DNA sequences; improving low Power, high speed linear processing acceleration required in genetic sequences computing. Our proposed design work when implemented in PLD-RNS-SWA based high profile acceleration comparator, exhibits a greater significant percentage speed when compare with the non RNS state of art profiler in real time processing design supporting a very high speed integrated Circuits.

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Cite This Study

Chinedu Emmanuel Okonkwo (2026) studied this question.

synapsesocial.com/papers/6a095b5d7880e6d24efe120ahttps://doi.org/10.5281/zenodo.20204871
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